In a joint announcement reflecting the growing importance of ecosystem collaboration in semiconductor design, Synopsys and Intel Foundry have expanded their partnership in support of chip development on Intel’s 18A and 18A-P process technologies.

The Synsopsys 40G UCIe IP affords up to 12.9Tbps per mm of data to efficiently travel between heterogeneous and/or homogeneous chiplet dies, with minimal silicon footprint. Higher bandwidth between chiplets is critical for enabling next-generation processor designs, and advanced AI and automotive ADAS systems, which must move massive amounts of data. Of note is that, despite its higher performance, Synopsys’ IP remains compliant with the UCIe 2.0 specification.

Last week, out in Silicon Valley, there was a meeting of the minds in artificial intelligence and AI-driven chip design.

Despite its numerous successes in recent years, however, Synopsys isn’t done innovating. Last week the company announced a strategic collaboration with Microsoft to deliver what it is calling the Synopsys.ai Copilot, a contextually-aware generative AI (GenAI) tool that assists human design teams via conversational intelligence using natural language.

In recent years, the RISC-V architecture has gained significant traction amongst a wide variety of chipmakers. It may be less than a decade since the first RISC-V workshops were held, but today the open architecture is finding its way into a myriad of chips and technologies industry-wide. It was just a couple of weeks ago when tech giants Google and Qualcomm announced they’d be teaming up on a RISC-V based Snapdragon Wearable Platform for future Wear OS devices, and today – with the RISC-V Summit currently underway in Santa Clara – silicon design, verification and IP leader Synopsys has announced an array of new 32-bit and 64-bit ARC-V Processor IP targeting embedded automotive, storage, and IoT applications.

The digitization of the modern car or truck has kicked into high gear over the past few years, from Advanced Driver Assistance Systems (ADAS) and Infotainment systems, to ECUs for engine control, PCMs for powertrain control, and more. It’s against the backdrop of this major growth trajectory that EDA (Electronic Design Automation) semiconductor tools bellwether, Synopsys, stepped out today to announce the acquisition of German automotive software testing and verification house PikeTec GmbH, for an undisclosed sum.

At its longstanding SNUG (Synopsys Users Group) Conference, currently underway at the Santa Clara Convention Center in California, Synopsys unveiled powerful additions to its AI-enhanced Electronic Design Automation (EDA) tools suite, with new solutions for functional verification and silicon testing, aptly named Synopsys VSO.ai and Synopsys TSO.ai, respectively. VSO.ai and TSO.ai join the company’s existing DSO.ai to complete what Synopsys is calling Synopsys.ai for chip design.

Machine Learning, or what the industry generally refers to as AI, has permeated many industries as a driving force that enables new-found capability and performance, such that it appears as though nearly everything is going “smart.” As I reported in September, even semiconductor chip design itself is being optimized with AI, and it’s making big strides in design efficiency for next-gen chip tech. Electronic Design Automation tools (EDA) bellwether, Synopsys, recently chalked up its 100th AI-designed chip tape-out with top industry players like STMicroelectronics, SK Hynix and Microsoft stepping out in endorsement of the company’s DSO.ai.

Late last year, the US Department of Defense (DOD) put in motion a program called RAMP-C (Rapid Assured Microelectronics Prototypes – Commercial). The goal of this program is to help create state-of-the-art commercial semiconductor design, foundry and fabrication services with access for critical DOD systems and infrastructure. In the process, the US DOD awarded Intel an agreement to provide commercial chip foundry services in the first phase of this program. In-turn Intel Foundry Services (IFS) will be working with key partners such as Synopsys.

This new chip design tool seed program for startups could help accelerate the pace of innovation in many markets and industries.

Built into in the CHIPS and Science Act is approximately $52.7 billion designated for the American semiconductor industry. Of that number, roughly $39 billion is earmarked for manufacturing incentives, including $2 billion for already-designed chips currently used in automobiles and defense systems. Another $13.2 billion is targeted at R&D and workforce development, with an additional $500 million destined for international information communications technology security and semiconductor supply chain activities.

Announced in collaboration with Microsoft, Synopsys Cloud will give customers access to Synopsys’ cloud-optimized, AI-infused design tools, on optimized infrastructure in Microsoft’s Azure cloud computing platform.

Chip design tools bellwether, Synopsys, is making great strides at harnessing machine learning in many areas of chip design. The latest AI-fueled innovation Synopsys has on tap is Silicon Remastering of legacy chips in newer, more modern chip fab processes.

Companies like Synopsys are making great strides to usher in a new era of holistic design approaches for chip technologies, fueled by AI-enhanced automation.

This year, Hot Chips was opened with a keynote presentation by Aart de Geus, Synopsys Chairman and co-CEO, and what he revealed could have significant, lasting implications on chip design moving forward.

As detrimental as the current semiconductor shortage is, however, another challenging shortage may be looming, and it’s one that could stall development and innovation of new chips and processors worldwide, without a sea change in how chips are designed.